406 research outputs found

    Idiomatic integrated circuit design

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    Ecological appropriation of Joel

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    Most modern ecological-hermeneutical approaches to biblical interpretation of prophetic texts have concentrated on identifying the ecological significance of the text in its original historical context. Given the urgency of concerns about the modern ecological crisis, there is also a need to use scripture to assist in development of contemporary environmental ethics within an industrialised society. This paper describes a technique called ecological appropriation which seeks to take a biblical text, in this case the book of Joel, and apply its message to modern ecological concerns, whilst still preserving its fundamental theological message. This technique yields new insights into an appropriate, biblically-inspired response to the ecological crisis which involves key steps of acknowledgement, mourning, repentance, judgement, return to God, and restoration

    Single Bit Error Correction Implementation in CRC-16 on FPGA

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    Framing protocols employ cyclic redundancy check (CRC) to detect errors incurred during transmission. Generally whole frame is protected using CRC and upon detection of error, retransmission is requested. But certain protocols demand for single bit error correction capabilibties for the header part of the frame, which often plays an important role in the receiver synchronization. At a speed of 10 Gbps, header error correction implementation in hardware can be a bottleneck. This paper presents a hardware efficient way of implementing CRC-16 over 16 bits of data, multiple bit error detection and single bit error correction on FPGA device

    Gas inflows towards the nucleus of the active galaxy NGC7213

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    We present two-dimensional stellar and gaseous kinematics of the inner 0.8x1.1kpc^2 of the LINER/Seyfert 1 galaxy NGC7213, from optical spectra obtained with the GMOS integral field spectrograph on the Gemini South telescope at a spatial resolution of 60pc. The stellar kinematics shows an average velocity dispersion of 177km/s, circular rotation with a projected velocity amplitude of 50km/s and a kinematic major axis at a position angle of -4degrees (west of north). From the average velocity dispersion we estimate a black hole mass of M_BH=8_{-6}^{+16}x10^7 M_sun. The gas kinematics is dominated by non-circular motions, mainly along two spiral arms extending from the nucleus out to 4arcsec (280pc) to the NW and SE, that are cospatial with a nuclear dusty spiral seen in a structure map of the nuclear region of the galaxy. The projected gas velocities along the spiral arms show blueshifts in the far side and redshifts in the near side, with values of up to 200km/s. This kinematics can be interpreted as gas inflows towards the nucleus along the spiral arms if the gas is in the plane of the galaxy. We estimate the mass inflow rate using two different methods. The first is based of the observed velocities and geometry of the flow, and gives a mass inflow rate in the ionised gas of 7x10^-2 M_sun/yr. In the second method, we calculate the net ionised gas mass flow rate through concentric circles of decreasing radii around the nucleus resulting in mass inflow rates ranging from 0.4 M_sun/yr at 300pc down to 0.2 M_sun/yr at 100pc from the nucleus. These rates are larger than necessary to power the active nucleus.Comment: 10 pages, 10 figures, accepted for publication in MNRA

    Multi-mode Tracking of a Group of Mobile Agents

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    We consider the problem of tracking a group of mobile nodes with limited available computational and energy resources given noisy RSSI measurements and position estimates from group members. The multilateration solutions are known for energy efficiency. However, these solutions are not directly applicable to dynamic grouping scenarios where neighbourhoods and resource availability may frequently change. Existing algorithms such as cluster-based GPS duty-cycling, individual-based tracking, and multilateration-based tracking can only partially deal with the challenges of dynamic grouping scenarios. To cope with these challenges in an effective manner, we propose a new group-based multi-mode tracking algorithm. The proposed algorithm takes the topological structure of the group as well as the availability of the resources into consideration and decides the best solution at any particular time instance. We consider a clustering approach where a cluster head coordinates the usage of resources among the cluster members. We evaluate the energy-accuracy trade-off of the proposed algorithm for various fixed sampling intervals. The evaluation is based on the 2D position tracks of 40 nodes generated using Reynolds' flocking model. For a given energy budget, the proposed algorithm reduces the mean tracking error by up to 20%20\% in comparison to the existing energy-efficient cooperative algorithms. Moreover, the proposed algorithm is as accurate as the individual-based tracking while using almost half the energy.Comment: Accepted for publication in the 20th international symposium on wireless personal multimedia communications (WPMC-2017

    RSSI-Based Self-Localization with Perturbed Anchor Positions

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    We consider the problem of self-localization by a resource-constrained mobile node given perturbed anchor position information and distance estimates from the anchor nodes. We consider normally-distributed noise in anchor position information. The distance estimates are based on the log-normal shadowing path-loss model for the RSSI measurements. The available solutions to this problem are based on complex and iterative optimization techniques such as semidefinite programming or second-order cone programming, which are not suitable for resource-constrained environments. In this paper, we propose a closed-form weighted least-squares solution. We calculate the weights by taking into account the statistical properties of the perturbations in both RSSI and anchor position information. We also estimate the bias of the proposed solution and subtract it from the proposed solution. We evaluate the performance of the proposed algorithm considering a set of arbitrary network topologies in comparison to an existing algorithm that is based on a similar approach but only accounts for perturbations in the RSSI measurements. We also compare the results with the corresponding Cramer-Rao lower bound. Our experimental evaluation shows that the proposed algorithm can substantially improve the localization performance in terms of both root mean square error and bias.Comment: Accepted for publication in 28th Annual IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (IEEE PIMRC 2017

    An analysis of FPGA-based custom computers for DSP applications

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    Field programmable gate arrays (FPGAs) can be rapidly reconfigured to provide different digital logic functions. When such FPGA logic circuits are incorporated within a stored-program computer, the result is a machine where the programmer can design both the software and the hardware that will execute that software. This paper first surveys this area of custom computing. It then describes a new custom computing architecture which uses a processing node with three sections: a standard arithmetic chip, static RAM and reconfigurable logic for operand handling. Finally an analysis of the suitability of this new approach for implementation of DSP applications shows it to be worthy of further investigation

    Architecture design of a fully asynchronous VLSI chip for DSP custom applications

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    A fully asynchronous, distributed VLSI architecture is introduced for dedicated real-time digital signal processing applications. The architecture is based on a data-driven computing model to allow maximum exploitation of the fine-grained concurrency. An asynchronous, self-time signaling protocol is used in the architecture to naturally match data-driven computing and circumvent the clock skew problem. After a brief description of the architecture, key issues of the architecture, such as the interconnection network, data identification, and operand matching are discussed. Finally, disadvantages of the architecture and future work are outlined

    Comparing the performance of FPGA-based custom computers with general-purpose computers for DSP applications

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    When FPGA logic circuits are incorporated within a stored-program computer, the result is a machine where the programmer can design both the software and the hardware that will execute that software. This paper first describes some of the more important custom computers, and their potential weakness as DSP implementation platforms. It then describes a new custom computing architecture which is specifically designed for efficient implementation of DSP algorithms. Finally, it presents a simple performance comparison of a number of DSP implementation alternatives, and concludes that the new custom computing architecture is worthy of further investigation, and that custom computers based only on FPGA execution units show little performance improvement over state-of-the-art workstations
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